Referring to FIG. 1A, the basic architecture of an RF transmitter 1 includes a digital-to-analog converter (DAC) 2, a filter 3, a mixer (up-conversion to the transmitted frequency) 4, a gain control circuit (Variable Gain Amplifier or VGA) 5 and a power amplifier 6 having an output coupled to a transmit antenna 7. The VGA 5 is used to adjust the output power of the transmitter 1 to the desired level. Referring also to FIG. 1B, bipolar differential pairs, also referred to as a quad 5A, is used as a part of the VGA 5. A DC control voltage (gain control) is applied through a temperature compensation block 5B and causes the gain of the VGA 5 to change. Current is steered between the bipolar junction transistors (bjts) of the quad 5A, and can be considered to be divided between a first desired or “wanted” current branch and a second un-used or “waste” current branch.
In general, a high dynamic range of the VGA 5 is achieved by the current steering in the bjt differential pair or quad 5A. However, the current steering performance of the quad 5A is very much temperature dependent, and therefore the temperature compensation circuit 5B is required for driving the quad 5A.
It has been observed that the accuracy of the temperature compensation block 5B degrades when operating at a low VGA output power, i.e., when operating with a low value of the gain control voltage. In the absence of some type of calibration procedure it becomes necessary to reserve additional margin in the gain control circuitry to ensure a desired VGA dynamic range, as the gain slope can exhibit a considerable amount of variation, as shown in FIG. 2A.
As one non-limiting example, a wideband code division, multiple access (WCDMA) transmitter system requires a large dynamic range in the transmitter signal path. However, the gain variations can result in a reduction of the dynamic range, and/or in experiencing different performance during dynamic conditions such as ramp-up of the power during transmission. In addition, a WCDMA transmitter 1 can be required to be on for long period of time, which may tend to increase the severity of temperature-related performance problems.
The circuitry shown in FIGS. 1A and 1B is typically integrated into one or more integrated circuits. As such, and due to largely unavoidable variations in integrated circuit process parameters, the output power of different integrated circuits are not same at the same value of the control voltage (or current). As can be appreciated, a requirement to design additional margin into the gain control circuitry can result in an undesirable increase in both cost and circuit complexity.
Reference can be had to the following commonly assigned U.S. patents for descriptions of various prior art VGA circuits and techniques, used in RF transmitters as well as in RF receivers: U.S. Pat. No. 5,548,616, L. Mucke et al.; U.S. Pat. No. 5,752,172, J. Matero; U.S. Pat. No. 5,752,170, P. Clifford; U.S. Pat. No. 5,884,149, M. Jaakola; U.S. Pat. No. 6,009,129, T. Kenney et al; U.S. Pat. No. 6,060,950, J. Groe; U.S. Pat. No. 6,167,273, G. Mandyam; U.S. Pat. No. 6,084,471, R. Ruth, Jr. et al.; U.S. Pat. No. 6,178,313 B1, P. Mages et al.; U.S. Pat. No. 6,317,589 B1, A. Nash and U.S. Pat. No. 6,370,358 B2, J. Liimatainen.